1. Field of the Invention
The present invention relates to a microprocessor, and more specifically, to a technique detecting a maximum value or a minimum value out of a plurality of data, and an address thereof in a microprocessor.
2. Description of Related Art
A microprocessor executes various processings including a process of detecting a maximum value or a minimum value out of a plurality of data stored in a storage means such as a memory, and an address thereof. A technique for quickly performing this processing has now been studied.
FIG. 19 shows FIG. 1 of Japanese Unexamined Patent Application Publication No. 07-056733 (related art 1), and shows a microprocessor executing the above processing by a method disclosed in the related art 1. Now, the microprocessor in FIG. 19 will be described by taking a processing detecting the minimum value as an example.
The microprocessor includes a storage device 2 storing data, an address generating circuit 4, an address pointer 6, a table retrieving circuit 10, an input port 43, an input port 44, a computing element 3, and an accumulator 5. The address generating circuit 4 sequentially generates a reading address, and the address pointer 6 sequentially outputs the reading address to the storage device 2. The storage device 2 outputs data stored in the reading address from the address pointer 6. The table retrieving circuit 10 receives the reading address from the address pointer 6 together with the data from the storage device 2. Then the table retrieving circuit 10 inputs the data to an upper bit storing part 43A of one input port 43 in the computing element 3 and inputs the reading address to a lower bit storing part 43B. The accumulator 5 stores a previous calculation result of the computing element 3, and inputs the calculation result to the other input port 44 of the computing element 3. The computing element 3 compares synthetic data (data and address) stored in the input port 43 with previous synthetic data which is the previous calculation result stored in the input port 44, and outputs the smaller value to the accumulator 5 as a new calculation result.
In the technique disclosed in the related art 1, the synthetic data is obtained by setting the data and the address to the upper bit and the lower bit respectively. Then the minimum value is obtained by using the synthetic data, so that the minimum value and the address can be obtained at the same time, whereby the high speed processing is realized.
As the throughput of the microprocessor has been increasing, there is a growing demand for high speed operation. The process for detecting the maximum value or the minimum value is also needs to be performed in high speed. In the technique disclosed in the related art 1, the synthetic data is generated and comparing is performed to obtain the maximum value or the minimum value or the address thereof at the same time. However, the effect of the high speed operation is limited since the data is processed one by one and the execution cycle is required to generate the synthetic data.